JAWAHARLAL NEHRU TECHNOLOGICAL
UNIVERSITY KAKINADA
B.TECH.
(COMMON FOR COMPUTER SCIENCE ENGINEERING AND INFORMATION
TECHNOLOGY)
II Year B.Tech. – I Sem
DIGITAL LOGIC DESIGN
Unit I :
Number Systems
Binary, Octal, Decimal, Hexadecimal Number Systems. Conversion
of Numbers from One Radix to another radix, r’s Complement and (r-1)’s
Complement Subtraction of Unsigned Numbers, Problems, Signed Binary Numbers,
Weighted and Non weighted codes.
Unit II :
Logic Gates And Boolean Algebra
Basic Gates NOT, AND, OR, Boolean Theorems, Complement And Dual
of Logical Expressions, Universal Gates, Ex-Or and Ex-Nor Gates, SOP,POS,
Minimizations of Logic Functions Using Boolean Theorems, Two level Realization
of Logic Functions Using Universal Gates. Verilog programming for the minimized
logic functions.
Gate- Level
Minimization
Karnaugh Map Method (K-Map): Minimization of Boolean Functions
maximum upto Four Variables , POS And SOP, Simplifications With Don’t Care Conditions
Using K-Map.
Unit III:
Design of Half Adder, Full Adder, Half Subtractor, Full
Subtractor, Ripple Adders and Subtractors, Ripple Adder/Subtractor Using Ones
and Twos Complement Method. Design of Decoders, Encoders, Multiplexers,
Demultiplexers, Higher Order Demultiplexers and Multiplexers, Priority Encoder,
Code Converters, Magnitude Comparator.
Unit IV:
Introduction to Sequential Logic Circuits
Classification of Sequential Circuits, Basic Sequential Logic
Circuits: Latch and Flip-Flop, RS- Latch Using NAND and NOR Gates, Truth
Tables. RS,JK,T and D Flip Flops , Truth and Excitation Tables, Conversion of
Flip Flops. Flip Flops With Asynchronous Inputs (Preset and Clear).
Unit V:
Registers and Counters
Design of Registers, Buffer Register, Control Buffer Registers,
Bidirectional Shift Registers, Universal Shift Register, Design of Ripple
Counters, Synchronous Counters and Variable Modulus Counters, Ring Counter, Johnson
Counter.
Unit VI:
Introduction to Programmable Logic Devices (PLD’s)
PLA,
PAL, PROM. Realization of Switching Functions Using PROM, PAL and PLA.
Comparison of PLA, PAL and PROM..
