Monday, 29 September 2014

DLD UNIT-1 Assignment


Dear students, you have to submit this UNIT-1 Assignment on 08-10-2014. 

DLD UNIT-1 Assignment

Saturday, 27 September 2014

DLD UNIT-I EXAMINATION Question paper on 27-09-2014 for CSE-A



Some 4-bit decimal codes

Some 4-bit decimal codes :


BCD CODES



Click the following link for BCD Codes

http://academic.evergreen.edu/projects/biophysics/technotes/program/bcd.htm


For BCD addition click the following link

http://www.electrical4u.com/bcd-or-binary-coded-decimal-bcd-conversion-addition-subtraction/

Weighted & Non-weighted codes

Weighted Codes

Weighted binary codes are those binary codes which obey the positional weight principle. Each position of the number represents a specific weight. Several systems of the codes are used to express the decimal digits 0 through 9. In these codes each decimal digit is represented by a group of four bits.


Non-Weighted Codes

In this type of binary codes, the positional weights are not assigned. The examples of non-weighted codes are Excess-3 code and Gray code.

EXCESS-3 CODE

The Excess-3 code is also called as XS-3 code. It is non-weighted code used to express decimal numbers. The Excess-3 code words are derived from the 8421 BCD code words adding (0011)2 or (3)10 to each code word in 8421. The excess-3 codes are obtained as follows
Example

GRAY CODE

It is the non-weighted code and it is not arithmetic codes. That means there are no specific weights assigned to the bit position. It has a very special feature that has only one bit will change, each time the decimal number is incremented as shown in fig. As only one bit changes at a time, the gray code is called as a unit distance code. The gray code is a cyclic code. Gray code cannot be used for arithmetic operation.

APPLICATION OF GRAY CODE

·         Gray code is popularly used in the shaft position encoders.

·         A shaft position encoder produces a code word which represents the angular position of the shaft.



HEXA DECIMAL ARITHMATIC



HEXA DECIMAL ARITHMATIC:

Hexadecimal Addition: 


BINARY CODES


BINARY CODES :
    
   Computer work with binary numbers, we work with decimal number.
   A code is needed to represent decimal numbers as binary numbers.
   The digital data is represented, stored and transmitted as group of binary digits(bits)
   The group of bits are also known as binary codes.
   Binary code can be classified as numeric codes and alphanumeric codes.
   Numeric codes are used to represented numeric information,  i.e, only numbers.
   Alpha numeric codes are used to represent alpha numeric information i.e , letters of the alphabet and        decimal number.

Classification of Binary codes:-
        The different binary codes can be classified as
        1.Weighted codes
        2.Non-weighted codes
        3.Reflective codes                                        
        4.Sequential codes
        5.Alpha numeric codes
        6.Error correction &Detection codes

        1.Weighted codes:-
              In weighted codes, each digit position of the number represents a specific weight.
             Examples for weighted codes are:
                               Binary, Octal, Decimal, Hexadecimal and BCD(8-4-2-1)codes.
ü  Binary code is a weighted code. The LSB in the binary code has a weight of 1, next digit has a                                                                                                              weight   of 2, next digit has a weight of 4 and next digit has a weight of 8.
                  Ex: 1 0 1 0
ü  Octal code is also weighted code. Starting from LSB the weights of different digits are 1,8,64,512..etc
                   Ex: 2 4 1 3
ü  Decimal code is also weighted code Starting from LSB the weights of different digits are 1,10,100,1000.
                                 Ex: 5 2 4 1
ü  Hexadecimal code is also weighted code. Starting from LSB the weights of different digits are 1,16,256..etc.
                                 Ex: 2 3 c
ü  BCD(8-4-2-1) is also a weighted code . Starting from LSB the weights of different digits are 1,2,4,8.
ü  The codes 8421,2421,5211 are weighted codes.

2.Non-Weighted Codes:-  

Non-weighted codes are not assign with any weight to each digit position . Each position   with the number does not have any fixed weight.
Ex: Excess-3 codes and  Gray codes are non weighted codes.

 3.Reflective Codes:-
A code is reflective if the code for 9 is the complement of code for  zero, 8 for 1,7 for 2, 6 for 3 and 5 for 4. 2421,5211,excess-3 are reflective codes.
However 8421 code is not reflective.

 4.Sequential Codes:-
A code is sequential when each succeeding code is one binary number greater than its preceding code. This property is useful in mathematical manipulation of data.

 Ex: 8421, excess-3 are sequential codes. 

Advantages of Binary Code

Following is the list of advantages that binary code offers.
·         Binary codes are suitable for the computer applications.
·         Binary codes are suitable for the digital communications.
·         Binary codes make the analysis and designing of digital circuits if we use the binary codes.

·         Since only 0 & 1 are being used, implementation becomes easy.

Attendance on 27-09-2014 for CSE-A & B

Attendance on 27-09-2014 for CSE-A 

Class   - 2Hrs

Absentees :23, 25, 31, 41, 42,48, 52, 53


Attendance on 27-09-2014 for CSE-B

Class - 1Hr

Absentees : 67, 71, 73, 77, 79, 81, 85, 89, 98, 99, A9, B2, B3, B4, B5, B9, LE-03


Friday, 26 September 2014

Attendance on 26-09-2014 for CSE-A & B

Attendance on 26-09-2014 for CSE-A

Class

Absentees: 6, 8, 25, 31, 43, 44, 53




Attendance on 26-09-2014 for CSE-B

Class


Absentees: 62, 65, 79, 93, 99, A1, A2, B1, B2, B4, B9, LE-03


Thursday, 25 September 2014

Implement all the logic gates using UNIVERSAL GATES- NAND & NOR



EXPERIMENT: 2 Verification of all gates using UNIVERSAL GATES

AIM:- (a). To study and verify the all logic gates using UNIVERSAL Gate NAND.

LEARNING OBJECTIVE:-
 Identify NAND  ICs and their specification.

COMPONENTS REQUIRED:-
 Logic gates (IC) trainer kit.
 Connecting patch chords or wires.
 IC 7400

THEORY:
NAND gate is actually a combination of two logic gates: AND gate followed by NOT gate. So its output is complement of the output of an AND gate.

This gate can have minimum two inputs, output is always one. By using only NAND gates, we can realize all logic functions: AND, OR, NOT, X-OR, X-NOR, NOR. So this gate is also called universal gate.

(1). NAND gates as NOT gate

A NOT produces complement of the input. It can have only one input, tie the inputs of a NAND gate together. Now it will work as a NOT gate. Its output is
Y = (A.A)’
=>                                                 Y = (A)’


(2). NAND gates as AND gate

A NAND produces complement of AND gate. So, if the output of a NAND gate is inverted, overall output will be that of an AND gate.
                                                Y = ((A.B)’)’
=>                                            Y = (A.B)



(3). NAND gates as OR gate

From De-Morgan’s theorems: (A.B)’ = A’ + B’
=>                                            (A’.B’)’ = A’’ + B’’ = A + B
So, give the inverted inputs to a NAND gate, obtain OR operation at output.


(4). NAND gates as X-OR gate
The output of a two input X-OR gate is shown by: Y = A’B + AB’. This can be achieved with the logic diagram shown in the left side.



Gate No.              Inputs                                       Output
    1                       A, B                                        (AB)’
    2                       A, (AB)’                                 (A (AB)’)’
    3                      (AB)’, B                                  (B (AB)’)’
    4                      (A (AB)’)’, (B (AB)’)’             A’B + AB’
Now the output from gate no. 4 is the overall output of the configuration.
Y         =          ((A (AB)’)’ (B (AB)’)’)’
            =          (A(AB)’)’’ + (B(AB)’)’’
            =          (A(AB)’) + (B(AB)’)
            =          (A(A’ + B)’) + (B(A’ + B’))
=          (AA’ + AB’) + (BA’ + BB’)
=          ( 0 + AB’ + BA’ + 0 )
=          AB’ + BA’
=>                                            Y         =          AB’ + A’B

 (5). NAND gates as NOR gate

A NOR gate is an OR gate followed by NOT gate. So connect the output of OR gate to a NOT gate, overall output is that of a NOR gate.
                                                Y = (A + B)’




Procedure:
  1. Connect the trainer kit to ac power supply.
  2. Connect the NAND gates for any of the logic functions to be realized.
  3. Connect the inputs of first stage to logic sources and output of the last gate to logic indicator.
  4. Apply various input combinations and observe output for each one.
  5. Verify the truth table for each input/ output combination.
  6. Repeat the process for all logic functions.
  7. Switch off the ac power supply.


 RESULT:



AIM:- (b). To study and verify the all logic gates using UNIVERSAL Gate NOR.

LEARNING OBJECTIVE:-
 Identify NOR  ICs and their specification.

COMPONENTS REQUIRED:-
 Logic gates (IC) trainer kit.
 Connecting patch chords or wires.
 IC 7402

Theory:
NOR gate is actually a combination of two logic gates: OR gate followed by NOT gate. So its output is complement of the output of an OR gate.

This gate can have minimum two inputs, output is always one. By using only NOR gates, we can realize all logic functions: AND, OR, NOT, X-OR, X-NOR, NAND. So this gate is also called universal gate.

 (1). NOR gates as NOT gate

A NOT produces complement of the input. It can have only one input, tie the inputs of a NOR gate together. Now it will work as a NOT gate. Its output is
Y = (A+A)’

=>                                                Y = (A)’

(2).NOR gates as OR gate

A NOR produces complement of OR gate. So, if the output of a NOR gate is inverted, overall output will be that of an OR gate.
                                                Y = ((A+B)’)’
=>                                            Y = (A+B)

(3). NOR gates as AND gate

From De-Morgan’s theorems: (A+B)’ = A’B’
=>                                            (A’+B’)’ = A’’B’’ = AB
So, give the inverted inputs to a NOR gate, obtain AND operation at output.

  (4). NOR gates as X-NOR gate

The output of a two input X-NOR gate is shown by: Y = AB + A’B’. This can be achieved with the logic diagram shown in the left side.



Gate No.          Inputs                                                   Output
1                      A, B                                                     (A + B)’
2                      A, (A + B)’                                          (A + (A+B)’)’
3                      (A + B)’, B                                          (B + (A+B)’)’
4                      (A + (A + B)’)’, (B + (A+B)’)’            AB + A’B’

Now the ouput from gate no. 4is the overall output of the configuration.
Y         =          ((A + (A+B)’)’ (B +( A+B)’)’)’
            =          (A+(A+B)’)’’.(B+(A+B)’)’’
            =          (A+(A+B)’).(B+(A+B)’)
            =          (A+A’B’).(B+A’B’)
=          (A + A’).(A + B’).(B+A’)(B+B’)
=          1.(A+B’).(B+A’).1
=          (A+B’).(B+A’)
                                                                  =          A.(B + A’) +B’.(B+A’)
                                                            =          AB + AA’ +B’B+B’A’
                                                            =          AB + 0 + 0 + B’A’
                                                            =          AB + B’A’
=>                                            Y         =          AB + A’B’


(5). NOR gates as NAND gate

A NAND gate is an AND gate followed by NOT gate. So connect the output of AND gate to a NOT gate, overall output is that of a NAND gate.
                                                Y = (AB)’



Procedure:

  1. Connect the trainer kit to ac power supply.
  2. Connect the NOR gates for any of the logic functions to be realized.
  3. Connect the inputs of first stage to logic sources and output of the last gate to logic indicator.
  4. Apply various input combinations and observe output for each one.
  5. Verify the truth table for each input/ output combination.
  6. Repeat the process for all logic functions.
  7. Switch off the ac power supply.


Precautions:
·         All IC’s must be checked before start the experiment.
·         All connections should made and tight.
·         While making connections main voltage should be kept switch off.
·         The circuit should be OFF before change the connection.

 RESULT: -