Friday, 26 September 2014

Attendance on 26-09-2014 for CSE-A & B

Attendance on 26-09-2014 for CSE-A

Class

Absentees: 6, 8, 25, 31, 43, 44, 53




Attendance on 26-09-2014 for CSE-B

Class


Absentees: 62, 65, 79, 93, 99, A1, A2, B1, B2, B4, B9, LE-03


Thursday, 25 September 2014

Implement all the logic gates using UNIVERSAL GATES- NAND & NOR



EXPERIMENT: 2 Verification of all gates using UNIVERSAL GATES

AIM:- (a). To study and verify the all logic gates using UNIVERSAL Gate NAND.

LEARNING OBJECTIVE:-
 Identify NAND  ICs and their specification.

COMPONENTS REQUIRED:-
 Logic gates (IC) trainer kit.
 Connecting patch chords or wires.
 IC 7400

THEORY:
NAND gate is actually a combination of two logic gates: AND gate followed by NOT gate. So its output is complement of the output of an AND gate.

This gate can have minimum two inputs, output is always one. By using only NAND gates, we can realize all logic functions: AND, OR, NOT, X-OR, X-NOR, NOR. So this gate is also called universal gate.

(1). NAND gates as NOT gate

A NOT produces complement of the input. It can have only one input, tie the inputs of a NAND gate together. Now it will work as a NOT gate. Its output is
Y = (A.A)’
=>                                                 Y = (A)’


(2). NAND gates as AND gate

A NAND produces complement of AND gate. So, if the output of a NAND gate is inverted, overall output will be that of an AND gate.
                                                Y = ((A.B)’)’
=>                                            Y = (A.B)



(3). NAND gates as OR gate

From De-Morgan’s theorems: (A.B)’ = A’ + B’
=>                                            (A’.B’)’ = A’’ + B’’ = A + B
So, give the inverted inputs to a NAND gate, obtain OR operation at output.


(4). NAND gates as X-OR gate
The output of a two input X-OR gate is shown by: Y = A’B + AB’. This can be achieved with the logic diagram shown in the left side.



Gate No.              Inputs                                       Output
    1                       A, B                                        (AB)’
    2                       A, (AB)’                                 (A (AB)’)’
    3                      (AB)’, B                                  (B (AB)’)’
    4                      (A (AB)’)’, (B (AB)’)’             A’B + AB’
Now the output from gate no. 4 is the overall output of the configuration.
Y         =          ((A (AB)’)’ (B (AB)’)’)’
            =          (A(AB)’)’’ + (B(AB)’)’’
            =          (A(AB)’) + (B(AB)’)
            =          (A(A’ + B)’) + (B(A’ + B’))
=          (AA’ + AB’) + (BA’ + BB’)
=          ( 0 + AB’ + BA’ + 0 )
=          AB’ + BA’
=>                                            Y         =          AB’ + A’B

 (5). NAND gates as NOR gate

A NOR gate is an OR gate followed by NOT gate. So connect the output of OR gate to a NOT gate, overall output is that of a NOR gate.
                                                Y = (A + B)’




Procedure:
  1. Connect the trainer kit to ac power supply.
  2. Connect the NAND gates for any of the logic functions to be realized.
  3. Connect the inputs of first stage to logic sources and output of the last gate to logic indicator.
  4. Apply various input combinations and observe output for each one.
  5. Verify the truth table for each input/ output combination.
  6. Repeat the process for all logic functions.
  7. Switch off the ac power supply.


 RESULT:



AIM:- (b). To study and verify the all logic gates using UNIVERSAL Gate NOR.

LEARNING OBJECTIVE:-
 Identify NOR  ICs and their specification.

COMPONENTS REQUIRED:-
 Logic gates (IC) trainer kit.
 Connecting patch chords or wires.
 IC 7402

Theory:
NOR gate is actually a combination of two logic gates: OR gate followed by NOT gate. So its output is complement of the output of an OR gate.

This gate can have minimum two inputs, output is always one. By using only NOR gates, we can realize all logic functions: AND, OR, NOT, X-OR, X-NOR, NAND. So this gate is also called universal gate.

 (1). NOR gates as NOT gate

A NOT produces complement of the input. It can have only one input, tie the inputs of a NOR gate together. Now it will work as a NOT gate. Its output is
Y = (A+A)’

=>                                                Y = (A)’

(2).NOR gates as OR gate

A NOR produces complement of OR gate. So, if the output of a NOR gate is inverted, overall output will be that of an OR gate.
                                                Y = ((A+B)’)’
=>                                            Y = (A+B)

(3). NOR gates as AND gate

From De-Morgan’s theorems: (A+B)’ = A’B’
=>                                            (A’+B’)’ = A’’B’’ = AB
So, give the inverted inputs to a NOR gate, obtain AND operation at output.

  (4). NOR gates as X-NOR gate

The output of a two input X-NOR gate is shown by: Y = AB + A’B’. This can be achieved with the logic diagram shown in the left side.



Gate No.          Inputs                                                   Output
1                      A, B                                                     (A + B)’
2                      A, (A + B)’                                          (A + (A+B)’)’
3                      (A + B)’, B                                          (B + (A+B)’)’
4                      (A + (A + B)’)’, (B + (A+B)’)’            AB + A’B’

Now the ouput from gate no. 4is the overall output of the configuration.
Y         =          ((A + (A+B)’)’ (B +( A+B)’)’)’
            =          (A+(A+B)’)’’.(B+(A+B)’)’’
            =          (A+(A+B)’).(B+(A+B)’)
            =          (A+A’B’).(B+A’B’)
=          (A + A’).(A + B’).(B+A’)(B+B’)
=          1.(A+B’).(B+A’).1
=          (A+B’).(B+A’)
                                                                  =          A.(B + A’) +B’.(B+A’)
                                                            =          AB + AA’ +B’B+B’A’
                                                            =          AB + 0 + 0 + B’A’
                                                            =          AB + B’A’
=>                                            Y         =          AB + A’B’


(5). NOR gates as NAND gate

A NAND gate is an AND gate followed by NOT gate. So connect the output of AND gate to a NOT gate, overall output is that of a NAND gate.
                                                Y = (AB)’



Procedure:

  1. Connect the trainer kit to ac power supply.
  2. Connect the NOR gates for any of the logic functions to be realized.
  3. Connect the inputs of first stage to logic sources and output of the last gate to logic indicator.
  4. Apply various input combinations and observe output for each one.
  5. Verify the truth table for each input/ output combination.
  6. Repeat the process for all logic functions.
  7. Switch off the ac power supply.


Precautions:
·         All IC’s must be checked before start the experiment.
·         All connections should made and tight.
·         While making connections main voltage should be kept switch off.
·         The circuit should be OFF before change the connection.

 RESULT: -



Attendance on 25-09-2014 for CSE-A & B

Attendance on 25-09-2014 for CSE-A 

Class

Absentees: 8, 16, 22, 23, 25, 31, 42, 43, 48, 53



Attendance on 25-09-2014 for CSE-B

Class

Absentees: 65, 74, 86, 98, 99,  A1, B4, B9, LE-3

DLD Lab   (Batch : 561-590)

Absentees: 65

Tuesday, 23 September 2014

Attendance on 24-09-2014 for CSE-A & B

Attendance on 24-09-2014 for CSE-A

Class


Absentees: 25, 31, 53




Attendance on 24-09-2014 for CSE-B

Class


Absentees: 79, 91, A1, A8, B9, LE-SIVA

Attendance on 23-09-2014 for CSE-A & B

Attendance on 23-09-2014 for CSE-A 

Class

Absentees: 25, 31, 35, 42, 48, 52, 53



Attendance on 23-09-2014 for CSE-B

DLD Lab

Absentees: 91, 99, A1, A3, B2, B9


Monday, 22 September 2014

HALF ADDER & FULL ADDER EXPERIMENT

Students, you have to write this Expt in your RECORD.

Dont write the Eeperiment Number.


EXPERIMENT: 9 HALF ADDER AND FULL ADDER

AIM: To realize Half Adder and Full Adder using Basic gates

LEARNING OBJECTIVE:
_ To realize the half adder circuits using basic gates
_ To realize full adder using two half adders

COMPONENTS REQUIRED:
IC 7408, IC 7486, IC 7432, Patch Cords & IC Trainer Kit.

THEORY:

Adder circuit is a combinational digital circuit that is used for adding two numbers. A typical adder circuit produces a sum bit (denoted by S) and a carry bit (denoted by C) as the output. Typically adders are realized  for adding binary numbers but they can be also realized  for adding other formats like BCD (binary coded decimal, XS-3 etc. Besides addition, adder circuits can be used for a lot of other applications in digital electronics like address decoding, table index calculation etc. Adder circuits are of two types: Half adder ad Full adder.

Half-Adder: A combinational logic circuit that performs the addition of two data bits, A and
B, is called a half-adder. Addition will result in two output bits; one of which is the sum bit, S, and the other is the carry bit, C. The Boolean functions describing the half-adder are: S =A Å B C = A B

Full-Adder: The half-adder does not take the carry bit from its previous stage into account. This carry bit from its previous stage is called carry-in bit. A combinational logic circuit that adds two data bits, A and B, and a carry-in bit, Cin , is called a full-adder. The Boolean functions describing the full-adder are:
S = (x Å y) Å Cin C = xy + Cin (x Å y)

Half adder circuit diagram:




Full adder circuit diagram:





Procedure:

• Check the components for their working.
• Insert the appropriate IC into the IC base.
• Make connections as shown in the circuit diagram.
• Verify the Truth Table and observe the outputs.
Precautions:
·         All IC’s must be checked before start the experiment.
·         All connections should made and tight.
·         While making connections main voltage should be kept switch off.
·         The circuit should be OFF before change the connection.

RESULT: