How to learn CPP in easy process

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Cpp by Balaguruswamy - refer in online & download

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Digital Electronics by GODSE

DLD by GODSE refer in online

Attendance on 30-10-2014 for CSE-B

Attendance on 30-10-2014 for CSE-B


Class

Absentees:- 85, 91, LE-07

DLD Book Online

Refer DLD book in Online

Attendance on 29-10-2014 for CSE-A & B

Attendance on 29-10-2014 for CSE-A 

Class - 2hrs

Absentees:- 3, 25, 42


DLD Lab

Absentees:- 3



Attendance on 29-10-2014 for CSE-B

Absentees:- 67, 79, 85, 91, A8, B5, B9, LE-07

1-2 Results (R13)

JNTUK 1-2 RESULTS 

CLICK Here ....1-2 RESULTS (R13 Batch) - JNTUK


CLICK Here....1-2 RESULTS (R10 Batch) - JNTUK

Attendance on 28-10-2014 for CSE-A & B

Attendance on 28-10-2014 for CSE-A

Class - 2hrs

Absentees: - 36, 42, 48


Attendance on 28-10-2014 for CSE-B

DLD lab

Absentees :- 91, A4, B3, B5, B9

Encoders - Video Lecture

Click the following link for Encoders Video Lecture

Encoders - Video by Prof. Srinivasan

Attendance on 27-10-2014 for CSE-A & B

Attendance on 27-10-2014 for CSE-A 

DLD lab   (531-530 batch)

Absentees:- 33, 35, 40, 43, 45


CSE-A Class

Absentees:- 2, 3, 16, 20, 26, 33, 35, 40, 45, 50


Attendance on 27-10-2014 for CSE-B

Class

Absentees: - 66, 70, 72, 76, 79, 82, 94, A2, A4, A5, A6, B2, B5, B9, LE-03, LE-07

Attendance on 25-10-2014 for CSE-B

Attendance on 25-10-2014 for CSE-B

Class

Absentees:- 65, 67, 70, 74, 79, 81, 82, 84, 85, 87, 89, 93, 98, 99, A1, A3, A8, B4, B5, LE-03

Decoders

Click the following link for Decoders 


http://faculty.kfupm.edu.sa/COE/elrabaa/coe200/Lessons/Lesson3_4.pdf

Attendance on 24-10-2014 for CSE-B

Attendance on 24-10-2014 for CSE-B

Class - 2hrs

Absentees:- 61, 71, 74, 75, 78, 79, 80, 82, 84, 88, 90, 92, 93, 95, A2, A3, A5, A6, A8, B2, B4, B9, C0, LE-03


Attendance on 24-10-2014 for CSE-A

Class: -

Absentees: - 6, 9,15, 16, 18, 21, 23, 31, 33, 37, 40, 41, 42, 43, 46, 48, 50, 55

Comparators

The Digital Comparator

Another common and very useful combinational logic circuit is that of the Digital Comparator circuit. Digital or Binary Comparators are made up from standard AND, NORand NOT gates that compare the digital signals present at their input terminals and produce an output depending upon the condition of those inputs.

For example, along with being able to add and subtract binary numbers we need to be able to compare them and determine whether the value of input A is greater than, smaller than or equal to the value at input B etc. The digital comparator accomplishes this using several logic gates that operate on the principles of Boolean Algebra. There are two main types of Digital Comparatoravailable and these are.

• 1. Identity Comparator – an Identity Comparator is a digital comparator that has only one output terminal for when A = B either “HIGH”  A = B = 1 or “LOW”  A = B = 0
• 2. Magnitude Comparator – a Magnitude Comparator is a type of digital comparator that has three output terminals, one each for equality, A = B  greater than, A > B  and less thanA < B

The purpose of a Digital Comparator is to compare a set of variables or unknown numbers, for example A (A1, A2, A3, …. An, etc) against that of a constant or unknown value such as B (B1, B2, B3, …. Bn, etc) and produce an output condition or flag depending upon the result of the comparison. For example, a magnitude comparator of two 1-bits, (A and B) inputs would produce the following three output conditions when compared to each other.

 

Which means:  A is greater than B,  A is equal to B,  and A is less than B

This is useful if we want to compare two variables and want to produce an output when any of the above three conditions are achieved. For example, produce an output from a counter when a certain count number is reached. Consider the simple 1-bit comparator below.

1-bit Digital Comparator

 

Then the operation of a 1-bit digital comparator is given in the following Truth Table.

Digital Comparator Truth Table

Inputs		Outputs
B	A	A > B	A = B	A < B
0	0	0	1	0
0	1	1	0	0
1	0	0	0	1
1	1	0	1	0

You may notice two distinct features about the comparator from the above truth table. Firstly, the circuit does not distinguish between either two “0” or two “1”‘s as an output A = B is produced when they are both equal, either A = B = “0” or A = B = “1”. Secondly, the output condition for A = Bresembles that of a commonly available logic gate, the Exclusive-NOR or Ex-NOR function (equivalence) on each of the n-bits giving: Q = A ⊕ B

Digital comparators actually use Exclusive-NOR gates within their design for comparing their respective pairs of bits. When we are comparing two binary or BCD values or variables against each other, we are comparing the “magnitude” of these values, a logic “0” against a logic “1” which is where the term Magnitude Comparator comes from.

As well as comparing individual bits, we can design larger bit comparators by cascading together n of these and produce a n-bit comparator just as we did for the n-bit adder in the previous tutorial. Multi-bit comparators can be constructed to compare whole binary or BCD words to produce an output if one word is larger, equal to or less than the other.

A very good example of this is the 4-bit Magnitude Comparator. Here, two 4-bit words (“nibbles”) are compared to each other to produce the relevant output with one word connected to inputs Aand the other to be compared against connected to input B as shown below.

4-bit Magnitude Comparator

 

Some commercially available digital comparators such as the TTL 74LS85 or CMOS 4063 4-bit magnitude comparator have additional input terminals that allow more individual comparators to be “cascaded” together to compare words larger than 4-bits with magnitude comparators of “n”-bits being produced. These cascading inputs are connected directly to the corresponding outputs of the previous comparator as shown to compare 8, 16 or even 32-bit words.

8-bit Word Comparator

 

When comparing large binary or BCD numbers like the example above, to save time the comparator starts by comparing the highest-order bit (MSB) first. If equality exists, A = B then it compares the next lowest bit and so on until it reaches the lowest-order bit, (LSB). If equality still exists then the two numbers are defined as being equal.

If inequality is found, either A > B or A < B the relationship between the two numbers is determined and the comparison between any additional lower order bits stops. Digital Comparator are used widely in Analogue-to-Digital converters, (ADC) and Arithmetic Logic Units, (ALU) to perform a variety of arithmetic operations.

courtesy:-

http://www.electronics-tutorials.ws/combination/comb_8.html

Attendance on 22-10-2014 fro CSE-A & B

Attendance on 22-10-2014 fro CSE-A

Class - 2hrs

Absentees: - 8, 18, 21, 37, 42, 43, 48, 50

Topics covered:- (i). (BCD Subtraction (9's & 10's complement subtraction )
                             (ii). Decoders - 2to4 decoder & 3to8 decoder

DLD Lab:

Absentees: 6, 8, 16, 17, 18, 21, 29

Attendance on 22-10-2014 fro CSE-B

Absentees:- 71, 75, 79, 82, 84, 90, 92, 99, A1, A3, A4, A5, A7, A8, A9, B8, B9, LE-03

Attendance on 21-10-2014 for CSE -A & B

Attendance on 21-10-2014 for CSE -A

Class - 2hrs

Absentees: 18, 50

Attendance on 21-10-2014 for CSE -B

DLD Lab

Absentees: - A9, B8

Attendance on 20-10-2014 for CSE-B

Attendance on 20-10-2014 for CSE-B

Class

Absentees: - 73, 74, 79, 83, 95, 98, A2, A8, B9, LE-03

Attendance on 18-10-2014 for CSE-B

Attendance on 18-10-2014 for CSE-B

Class

Absentees: - 65, 74, 78, 79, 83, 91, 99, A7, B9, LE-503

Tests on UNIT-2

Tests/Blue book questions on UNIT-2

                                        Click the following link to get the Questions

https://drive.google.com/file/d/0B2SC6jed0s76QklIbk5JdnFsaEU/view?usp=sharing

Assignment - 2

Dear students, You have to submit Assignment -2   after DIWALI otherwise i will give ZERO marks.


                                           Click the following link to get the Questions.

https://drive.google.com/file/d/0B2SC6jed0s76WmZxU0hYcGpIMXM/view?usp=sharing

JNTU Circular about Exams Postpone

Revised TIMETABLE - JNTUK (Mid Exams)

Revised Timetable will be intimated later - JNTUK

Click the following link for Circular

JNTUK_Exam_Postponed.pdf - 455 KB




courtesy :

http://jwfiles.net/uv6j2szs8f5z/JNTUK_Exam_Postponed.pdf.html

Karnaugh Maps - Examples

Karnaugh Maps - Examples

By using the rules of simplification and ringing of adjacent cells in order to make as many variables redundant, the minimised result obtained is B + AC+ 

By using the rules of simplification and ringing of adjacent cells in order to make as many variables redundant, the minimised result obtained is B + A

courtesy:
http://www.ee.surrey.ac.uk/Projects/Labview/minimisation/karanswers.html

Introduction to Karnaugh Map

Karnaugh Maps - Rules of Simplification

---

The Karnaugh map uses the following rules for the simplification of expressions by grouping together adjacent cells containing ones

• Groups may not include any cell containing a zero
  
• Groups may be horizontal or vertical, but not diagonal.
  
• Groups must contain 1, 2, 4, 8, or in general 2ⁿ cells.
  That is if n = 1, a group will contain two 1's since 2¹ = 2.
  If n = 2, a group will contain four 1's since 2² = 4.
  
• Each group should be as large as possible.
  
• Each cell containing a one must be in at least one group.
  
• Groups may overlap.
  
• Groups may wrap around the table. The leftmost cell in a row may be grouped with the rightmost cell and the top cell in a column may be grouped with the bottom cell.
  
• There should be as few groups as possible, as long as this does not contradict any of the previous rules.
  

---

Summmary:

1. No zeros allowed.
2. No diagonals.
3. Only power of 2 number of cells in each group.
4. Groups should be as large as possible.
5. Every one must be in at least one group.
6. Overlapping allowed.
7. Wrap around allowed.
8. Fewest number of groups possible.

courtesy: http://www.ee.surrey.ac.uk/Projects/Labview/minimisation/karrules.html

A story about Prof. Karnaugh

Maurice Karnaugh

Maurice Karnaugh (born October 4, 1924, in New York City) is an American physicist known for the Karnaugh map used in Boolean algebra.

Karnaugh studied mathematics and physics at City College of New York (1944–48) and transferred to Yale University to complete his B.Sc. (1949), M.Sc. (1950) and Ph.D. in physics with a thesis on The Theory of Magnetic Resonance and Lambda-Type Doubling in Nitric-Oxide (1952).

Karnaugh worked at Bell Labs (1952–66), developing the Karnaugh map (1954) as well as patents for PCM encoding^[1]and magnetic logic circuits and coding.^[2][3] He later worked at IBM's Federal Systems Division in Gaithersburg (1966–70) and at the IBM Thomas J. Watson Research Center (1970–89), studying multistage interconnection networks.^[4]

Karnaugh was elected an IEEE Fellow in 1976, and held an adjunct position at Polytechnic University of New York at the Westchester campus from 1980 to 1999.

He has been married to the former Linn Blank Weil since 1970. He has two grown sons, Robert and Paul, from his first marriage.

courtesy : http://en.wikipedia.org/wiki/Maurice_Karnaugh

ATTENDANCE on 17-10-2014 for CSE-A & B

ATTENDANCE on 17-10-2014 for CSE-A

CLASS -   2hrs


Absentees : - 40, 42, 48




ATTENDANCE on 17-10-2014 for CSE-B

CLASS -   2hrs

Absentees: - 73, 74, 79, 85, 91, 93, A2,  A5,  B1,  B2,  B4, B9, LE-03

Attendance on 16-10-2014 for CSE-A & B

Attendance on 16-10-2014 for CSE-A 

Class

Absentees: 3, 40, 42, 48, 50, 56

Attendance on 16-10-2014 for CSE-B

DLD Lab

Absentees: 70, 79, 81

Attendance on 16-10-2014 for CSE-B

CLASS

Absentees: - 61, 62, 66, 68, 69, 71, 72, 73, 76, 77, 78, 79, 80, 81, 85, 86, 87, 88, 89, 90, 91, 94, 95, 96, 97, 98, 99, A2, A3, A5, A6, A7, A8, B0

Attendance on 15-10-2014 for CSE-A

Attendance on 15-10-2014 for CSE-A 

Class

Absentees: - 40

DLD Lab   (1 to 30 batch)

Absentess: - 23

Attendance on 14-10-2014 for CSE-A & B

Attendance on 14-10-2014 for CSE-A

Class

Absentees: 15, 40, 42, 48




Attendance on 14-10-2014 for CSE-B

DLD

Absentees: B9

Memory Units Bits

Memory Units :-
1 Bit = Binary Digit
 8 Bits = 1 Byte
1024 Bytes = 1 Kilo Byte (KB)
1024 KB = 1 MEGA Byte ( MB)
1024 MB = 1 Giga Byte (GB)
1024 GB = 1 Terra Byte (TB)
1024 TB = 1 Peta Byte (PB)
1024 PB = 1 Exa Byte (EB)
1024 EB = 1 Zeta Byte (ZB)
1024 ZB = 1 Yotta Byte (YB)
1024 YB = 1 Bronto Byte (BB)
1024 BB = 1 Geop Byte

De-Morgan Theorems

De-Morgan Theorems

We have known the basic operation of binary arithmetic such as binary addition, binary subtraction, binary multiplication and binary division. Now we will look through the most important part of binary arithmetic on which a lot of Boolean algebra stands, that is De-Morgan's Theorem which is called De-Morgan's Laws often.

Before discussing De-Morgan's theorems we should know about complements. Complements are the reverse value of the existing value. We are trying to say that as there are only two digits in binary number system 0 & 1. Now if A = 0 then complement of A will be 1 or A’ = 1.

There are actually two theorems that were put forward by De-Morgan. On the basis of DE Morgan’s laws much Boolean algebra are solved. Solving these types of algebra with De-Morgan's theorem has a major application in the field of digital electronics. De Morgan’s theorem can be stated as follows:-

Theorem 1:

The compliment of the product of two variables is equal to the sum of the compliment of each variable.

Thus according to De-Morgan's laws or De-Morgan's theorem if A and B are the two variables or Boolean numbers. Then accordingly

(A.B)’ = A’ + B’

Theorem 2:
The compliment of the sum of two variables is equal to the product of the compliment of each variable.

Thus according to De Morgan’s theorem if A and B are the two variables then.

(A + B)’ = A’.B’

De-Morgan's laws can also be implemented in Boolean algebra in the following steps:-

(1) While doing Boolean algebra at first replace the given operator. That is if (+) is there then replace it with (.) and if (.) is there then replace it with (+).

(2) Next compliment of each of the term is to be found.

De-Morgan's theorem can be proved by the simple induction method from the table given below.

1	2	3	4	5	6	7	8	9	10
A	B	A’	B	A+B	A.B	(A+B)’	A’.B’	(A.B)’	A’+B’
0	0	1	1	0	0	1	1	1	1
0	1	1	0	1	0	0	0	1	1
1	0	0	1	1	0	0	0	1	1
1	1	0	0	1	1	0	0	0	0

Now look at the table very carefully in each row. Firstly the value of A = 0 and the value of B = 0. Now for this values A’ = 1, B’ = 1. Again A+B = 0 and A.B = 0. Thus (A+B)’ = 1 and (A.B)’ = 1, A’ + B’ = 1 and A’.B’ = 1. From this table you can therefore see that the value of column no 7 and 8 are equal and column no 9 and 10 are also equal which proves the De-Morgan's theorem.

Again different values of A and B we see the same thing i.e. column no 7 and 8 are equal to each other and 9 and 10 are equal to each other. Thus by this truth table we can prove De-Morgan's theorem.

Some examples given below can make your idea clear.

Let, Solve AB + A’ + B’

AB + A’ + B’
= AB + (AB)’ [since accordingly (AB)' = A' + B' which is a De-Morgan's law]
= 1 [as in Boolean algebra A+A’=1]

Therefore, AB + A’ + B’ = 1. With the help of De-Morgan's theorem our calculation become much easier.

Courtesy: http://www.electrical4u.com/de-morgans-theorem-and-demorgans-laws/

A story about Prof. De-Morgan

Prof. Augustus De Morgan

Augustus De Morgan (27 June 1806 – 18 March 1871) was a British mathematician and logician. He formulated De Morgan's laws and introduced the term mathematical induction, making its idea rigorous.

Beyond his great mathematical legacy, the headquarters of the London Mathematical Society is called De Morgan House and the student society of the Mathematics Department of University College London is called the August De Morgan Society.

De Morgan proceeds to give an inventory of the fundamental symbols of algebra, and also an inventory of the laws of algebra. The symbols are 0, 1, +, −, ×, ÷, ()⁽⁾, and letters; these only, all others are derived. His inventory of the fundamental laws is expressed under fourteen heads, but some of them are merely definitions. The laws proper may be reduced to the following, which, as he admits, are not all independent of one another:

1.     Law of signs. + + = +, + − = −, − + = −, − − = +, × × = ×, × ÷ = ÷, ÷ × = ÷, ÷ ÷ = ×.

2.     Commutative law. a+b = b+a, ab=ba.

3.     Distributive law. a(b+c) = ab+ac.

4.     Index laws. a^b×a^c=a^b+c, (a^b)^c=a^bc, (ab)^d= a^d×b^d.

5.     a−a=0, a÷a=1.