Digital Logic Design
This blog is created for students purpose only - by Ram Thalluri PACE ECE
PPT's
DLD UNIT-4 PPT
Stld book, previous papers,UNIT-3
stld book
STLD Previous papers
UNIT-3 Part 01
UNIT-3 Part 02
DLD books
DLD nptel notes
DLD by A.K.Maini
DLD by Ashish kumar
unit-3 & 4 ppts
UNIT 3 Intro PPT
UNIT 3 PPT-1
UNIT 3 PPT-2
UNIT 4 PPT-1
Friday, 17 October 2014
Revised TIMETABLE - JNTUK (Mid Exams)
Revised Timetable will be intimated later - JNTUK
Click the following link for Circular
JNTUK_Exam_Postponed.pdf - 455 KB
courtesy :
http://jwfiles.net/uv6j2szs8f5z/JNTUK_Exam_Postponed.pdf.html
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